International Journal of Engineering In Advanced Research Science and Technology ISSN: 2278-256

نویسندگان

  • D. TULASI
  • K. SIRISHA
  • Y. N. S. VAMSI MOHAN
چکیده

The main objective of this project is to design a low power and reusable FM0/Manchester encoder for DSRC applications. Fully reused VLSI architecture using (similarity-oriented logic simplification) SOLS technique for both FM0 and Manchester encodings are proposed. Dedicated short-range communication is one-way or twoway short-range to medium-range wireless communication channels specifically designed for automotive use and a corresponding set of protocols and standards. The SOLS technique eliminates the limitation on hardware utilization by two core techniques: area compact retiming and balance logic-operation sharing. The balance logic-operation sharing efficiently combines FM0 and Manchester encodings with the identical logic components. Further, this project is enhanced by using clock gating technique to reduce the power consumption in memory organization.The power supply will be provided for corresponding accessed rows only.We have carried the simulation and verified the results using ISE simulator and synthesis is done on the XILINX ISE.

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International Journal of Engineering In Advanced Research Science and Technology ISSN: 2278-256

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تاریخ انتشار 2016